M src/gb/gb.c → src/gb/gb.c

@@ -163,7 +163,6 @@ if (!gb->memory.ime) {
 		return;
 	}
 
-	gb->cpu->irqh.setInterrupts(gb->cpu, false);
 	if (irqs & (1 << GB_IRQ_VBLANK)) {
 		LR35902RaiseIRQ(gb->cpu, GB_VECTOR_VBLANK);
 		gb->memory.io[REG_IF] &= ~(1 << GB_IRQ_VBLANK);

M src/lr35902/isa-lr35902.c → src/lr35902/isa-lr35902.c

@@ -732,14 +732,30 @@ DEFINE_INSTRUCTION_LR35902(DI, cpu->irqh.setInterrupts(cpu, false));
 DEFINE_INSTRUCTION_LR35902(EI, cpu->irqh.setInterrupts(cpu, true));
 DEFINE_INSTRUCTION_LR35902(HALT, cpu->irqh.halt(cpu));
 
-DEFINE_INSTRUCTION_LR35902(RST00, LR35902RaiseIRQ(cpu, 0x00));
-DEFINE_INSTRUCTION_LR35902(RST08, LR35902RaiseIRQ(cpu, 0x08));
-DEFINE_INSTRUCTION_LR35902(RST10, LR35902RaiseIRQ(cpu, 0x10));
-DEFINE_INSTRUCTION_LR35902(RST18, LR35902RaiseIRQ(cpu, 0x18));
-DEFINE_INSTRUCTION_LR35902(RST20, LR35902RaiseIRQ(cpu, 0x20));
-DEFINE_INSTRUCTION_LR35902(RST28, LR35902RaiseIRQ(cpu, 0x28));
-DEFINE_INSTRUCTION_LR35902(RST30, LR35902RaiseIRQ(cpu, 0x30));
-DEFINE_INSTRUCTION_LR35902(RST38, LR35902RaiseIRQ(cpu, 0x38));
+#define DEFINE_RST_INSTRUCTION_LR35902(VEC) \
+	DEFINE_INSTRUCTION_LR35902(RST ## VEC ## UpdateSPL, \
+		cpu->pc = 0x ## VEC; \
+		cpu->executionState = LR35902_CORE_STALL;) \
+	DEFINE_INSTRUCTION_LR35902(RST ## VEC ## UpdateSPH, \
+		cpu->index = cpu->sp + 1; \
+		cpu->bus = (cpu->pc + 2) >> 8; \
+		cpu->executionState = LR35902_CORE_MEMORY_STORE; \
+		cpu->instruction = _LR35902InstructionRST ## VEC ## UpdateSPL;) \
+	DEFINE_INSTRUCTION_LR35902(RST ## VEC, \
+		cpu->sp -= 2; /* TODO: Atomic incrementing? */ \
+		cpu->index = cpu->sp; \
+		cpu->bus = cpu->pc; \
+		cpu->executionState = LR35902_CORE_MEMORY_STORE; \
+		cpu->instruction = _LR35902InstructionRST ## VEC ## UpdateSPH;)
+
+DEFINE_RST_INSTRUCTION_LR35902(00);
+DEFINE_RST_INSTRUCTION_LR35902(08);
+DEFINE_RST_INSTRUCTION_LR35902(10);
+DEFINE_RST_INSTRUCTION_LR35902(18);
+DEFINE_RST_INSTRUCTION_LR35902(20);
+DEFINE_RST_INSTRUCTION_LR35902(28);
+DEFINE_RST_INSTRUCTION_LR35902(30);
+DEFINE_RST_INSTRUCTION_LR35902(38);
 
 DEFINE_INSTRUCTION_LR35902(STUB, cpu->irqh.hitStub(cpu));
 

M src/lr35902/lr35902.c → src/lr35902/lr35902.c

@@ -90,6 +90,7 @@ cpu->index = cpu->sp;
 	cpu->bus = cpu->pc;
 	cpu->executionState = LR35902_CORE_MEMORY_STORE;
 	cpu->instruction = _LR35902InstructionIRQFinish;
+	cpu->irqh.setInterrupts(cpu, false);
 }
 
 void LR35902Tick(struct LR35902Core* cpu) {