M src/arm/decoder-thumb.c → src/arm/decoder-thumb.c

@@ -42,7 +42,7 @@ #define DEFINE_IMMEDIATE_5_DECODER_MEM_STORE_THUMB(NAME, IMMEDIATE, MNEMONIC, WIDTH) \
 	DEFINE_IMMEDIATE_5_DECODER_MEM_THUMB(NAME, IMMEDIATE, MNEMONIC, STORE_CYCLES, WIDTH)
 
 #define DEFINE_IMMEDIATE_5_DECODER_THUMB(NAME, MNEMONIC, TYPE, WIDTH) \
-	COUNT_5(DEFINE_IMMEDIATE_5_DECODER_ ## TYPE ## _THUMB, NAME ## _, MNEMONIC, WIDTH)
+	COUNT_CALL_5(DEFINE_IMMEDIATE_5_DECODER_ ## TYPE ## _THUMB, NAME ## _, MNEMONIC, WIDTH)
 
 DEFINE_IMMEDIATE_5_DECODER_THUMB(LSL1, LSL, DATA,)
 DEFINE_IMMEDIATE_5_DECODER_THUMB(LSR1, LSR, DATA,)
@@ -66,7 +66,7 @@ ARM_OPERAND_REGISTER_2 | \
 			ARM_OPERAND_REGISTER_3;)
 
 #define DEFINE_DATA_FORM_1_DECODER_THUMB(NAME) \
-	COUNT_3(DEFINE_DATA_FORM_1_DECODER_EX_THUMB, NAME ## 3_R, NAME)
+	COUNT_CALL_3(DEFINE_DATA_FORM_1_DECODER_EX_THUMB, NAME ## 3_R, NAME)
 
 DEFINE_DATA_FORM_1_DECODER_THUMB(ADD)
 DEFINE_DATA_FORM_1_DECODER_THUMB(SUB)
@@ -83,7 +83,7 @@ ARM_OPERAND_REGISTER_2 | \
 			ARM_OPERAND_IMMEDIATE_3;)
 
 #define DEFINE_DATA_FORM_2_DECODER_THUMB(NAME) \
-	COUNT_3(DEFINE_DATA_FORM_2_DECODER_EX_THUMB, NAME ## 1_, NAME)
+	COUNT_CALL_3(DEFINE_DATA_FORM_2_DECODER_EX_THUMB, NAME ## 1_, NAME)
 
 DEFINE_DATA_FORM_2_DECODER_THUMB(ADD)
 DEFINE_DATA_FORM_2_DECODER_THUMB(SUB)
@@ -98,7 +98,7 @@ AFFECTED | \
 			ARM_OPERAND_IMMEDIATE_2;)
 
 #define DEFINE_DATA_FORM_3_DECODER_THUMB(NAME, MNEMONIC, AFFECTED) \
-	COUNT_3(DEFINE_DATA_FORM_3_DECODER_EX_THUMB, NAME ## _R, MNEMONIC, AFFECTED)
+	COUNT_CALL_3(DEFINE_DATA_FORM_3_DECODER_EX_THUMB, NAME ## _R, MNEMONIC, AFFECTED)
 
 DEFINE_DATA_FORM_3_DECODER_THUMB(ADD2, ADD, ARM_OPERAND_AFFECTED_1)
 DEFINE_DATA_FORM_3_DECODER_THUMB(CMP1, CMP, ARM_OPERAND_NONE)
@@ -182,7 +182,7 @@ #define DEFINE_IMMEDIATE_WITH_REGISTER_MEM_STORE_THUMB(NAME, RD, MNEMONIC, REG) \
 	DEFINE_IMMEDIATE_WITH_REGISTER_MEM_THUMB(NAME, RD, MNEMONIC, REG, STORE_CYCLES)
 
 #define DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(NAME, MNEMONIC, TYPE, REG) \
-	COUNT_3(DEFINE_IMMEDIATE_WITH_REGISTER_ ## TYPE ## _THUMB, NAME ## _R, MNEMONIC, REG)
+	COUNT_CALL_3(DEFINE_IMMEDIATE_WITH_REGISTER_ ## TYPE ## _THUMB, NAME ## _R, MNEMONIC, REG)
 
 DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(LDR3, LDR, MEM_LOAD, ARM_PC)
 DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(LDR4, LDR, MEM_LOAD, ARM_SP)
@@ -205,7 +205,7 @@ ARM_MEMORY_REGISTER_OFFSET; \
 		CYCLES;)
 
 #define DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(NAME, MNEMONIC, CYCLES, TYPE) \
-	COUNT_3(DEFINE_LOAD_STORE_WITH_REGISTER_EX_THUMB, NAME ## _R, MNEMONIC, CYCLES, TYPE)
+	COUNT_CALL_3(DEFINE_LOAD_STORE_WITH_REGISTER_EX_THUMB, NAME ## _R, MNEMONIC, CYCLES, TYPE)
 
 DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDR2, LDR, LOAD_CYCLES, ARM_ACCESS_WORD)
 DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRB2, LDR, LOAD_CYCLES, ARM_ACCESS_BYTE)
@@ -228,7 +228,7 @@ ARM_MEMORY_WRITEBACK | \
 			DIRECTION;)
 
 #define DEFINE_LOAD_STORE_MULTIPLE_THUMB(NAME) \
-	COUNT_3(DEFINE_LOAD_STORE_MULTIPLE_EX_THUMB, NAME ## IA_R, NAME, ARM_MEMORY_INCREMENT_AFTER, 0)
+	COUNT_CALL_3(DEFINE_LOAD_STORE_MULTIPLE_EX_THUMB, NAME ## IA_R, NAME, ARM_MEMORY_INCREMENT_AFTER, 0)
 
 DEFINE_LOAD_STORE_MULTIPLE_THUMB(LDM)
 DEFINE_LOAD_STORE_MULTIPLE_THUMB(STM)

M src/arm/emitter-inlines.h → src/arm/emitter-inlines.h

@@ -26,24 +26,24 @@ RIGHT
 
 #define APPLY(F, ...) F(__VA_ARGS__)
 
-#define COUNT_1(EMITTER, PREFIX, ...) \
+#define COUNT_CALL_1(EMITTER, PREFIX, ...) \
 	EMITTER(PREFIX ## 0, 0, __VA_ARGS__) \
 	EMITTER(PREFIX ## 1, 1, __VA_ARGS__)
 
-#define COUNT_2(EMITTER, PREFIX, ...) \
-	COUNT_1(EMITTER, PREFIX, __VA_ARGS__) \
+#define COUNT_CALL_2(EMITTER, PREFIX, ...) \
+	COUNT_CALL_1(EMITTER, PREFIX, __VA_ARGS__) \
 	EMITTER(PREFIX ## 2, 2, __VA_ARGS__) \
 	EMITTER(PREFIX ## 3, 3, __VA_ARGS__)
 
-#define COUNT_3(EMITTER, PREFIX, ...) \
-	COUNT_2(EMITTER, PREFIX, __VA_ARGS__) \
+#define COUNT_CALL_3(EMITTER, PREFIX, ...) \
+	COUNT_CALL_2(EMITTER, PREFIX, __VA_ARGS__) \
 	EMITTER(PREFIX ## 4, 4, __VA_ARGS__) \
 	EMITTER(PREFIX ## 5, 5, __VA_ARGS__) \
 	EMITTER(PREFIX ## 6, 6, __VA_ARGS__) \
 	EMITTER(PREFIX ## 7, 7, __VA_ARGS__)
 
-#define COUNT_4(EMITTER, PREFIX, ...) \
-	COUNT_3(EMITTER, PREFIX, __VA_ARGS__) \
+#define COUNT_CALL_4(EMITTER, PREFIX, ...) \
+	COUNT_CALL_3(EMITTER, PREFIX, __VA_ARGS__) \
 	EMITTER(PREFIX ## 8, 8, __VA_ARGS__) \
 	EMITTER(PREFIX ## 9, 9, __VA_ARGS__) \
 	EMITTER(PREFIX ## A, 10, __VA_ARGS__) \
@@ -53,8 +53,8 @@ EMITTER(PREFIX ## D, 13, __VA_ARGS__) \
 	EMITTER(PREFIX ## E, 14, __VA_ARGS__) \
 	EMITTER(PREFIX ## F, 15, __VA_ARGS__)
 
-#define COUNT_5(EMITTER, PREFIX, ...) \
-	COUNT_4(EMITTER, PREFIX ## 0, __VA_ARGS__) \
+#define COUNT_CALL_5(EMITTER, PREFIX, ...) \
+	COUNT_CALL_4(EMITTER, PREFIX ## 0, __VA_ARGS__) \
 	EMITTER(PREFIX ## 10, 16, __VA_ARGS__) \
 	EMITTER(PREFIX ## 11, 17, __VA_ARGS__) \
 	EMITTER(PREFIX ## 12, 18, __VA_ARGS__) \
@@ -72,11 +72,57 @@ EMITTER(PREFIX ## 1D, 29, __VA_ARGS__) \
 	EMITTER(PREFIX ## 1E, 30, __VA_ARGS__) \
 	EMITTER(PREFIX ## 1F, 31, __VA_ARGS__) \
 
-#define DUMMY(X, ...) X,
-#define DUMMY_4(...) \
-	DUMMY(__VA_ARGS__) \
-	DUMMY(__VA_ARGS__) \
-	DUMMY(__VA_ARGS__) \
-	DUMMY(__VA_ARGS__)
+#define COUNT_1(EMITTER, PREFIX) \
+	EMITTER(PREFIX ## 0) \
+	EMITTER(PREFIX ## 1)
+
+#define COUNT_2(EMITTER, PREFIX) \
+	COUNT_1(EMITTER, PREFIX) \
+	EMITTER(PREFIX ## 2) \
+	EMITTER(PREFIX ## 3)
+
+#define COUNT_3(EMITTER, PREFIX) \
+	COUNT_2(EMITTER, PREFIX) \
+	EMITTER(PREFIX ## 4) \
+	EMITTER(PREFIX ## 5) \
+	EMITTER(PREFIX ## 6) \
+	EMITTER(PREFIX ## 7)
+
+#define COUNT_4(EMITTER, PREFIX) \
+	COUNT_3(EMITTER, PREFIX) \
+	EMITTER(PREFIX ## 8) \
+	EMITTER(PREFIX ## 9) \
+	EMITTER(PREFIX ## A) \
+	EMITTER(PREFIX ## B) \
+	EMITTER(PREFIX ## C) \
+	EMITTER(PREFIX ## D) \
+	EMITTER(PREFIX ## E) \
+	EMITTER(PREFIX ## F)
+
+#define COUNT_5(EMITTER, PREFIX) \
+	COUNT_4(EMITTER, PREFIX ## 0) \
+	EMITTER(PREFIX ## 10) \
+	EMITTER(PREFIX ## 11) \
+	EMITTER(PREFIX ## 12) \
+	EMITTER(PREFIX ## 13) \
+	EMITTER(PREFIX ## 14) \
+	EMITTER(PREFIX ## 15) \
+	EMITTER(PREFIX ## 16) \
+	EMITTER(PREFIX ## 17) \
+	EMITTER(PREFIX ## 18) \
+	EMITTER(PREFIX ## 19) \
+	EMITTER(PREFIX ## 1A) \
+	EMITTER(PREFIX ## 1B) \
+	EMITTER(PREFIX ## 1C) \
+	EMITTER(PREFIX ## 1D) \
+	EMITTER(PREFIX ## 1E) \
+	EMITTER(PREFIX ## 1F) \
+
+#define ECHO(...) __VA_ARGS__,
+#define ECHO_4(...) \
+	ECHO(__VA_ARGS__) \
+	ECHO(__VA_ARGS__) \
+	ECHO(__VA_ARGS__) \
+	ECHO(__VA_ARGS__)
 
 #endif

M src/arm/emitter-thumb.h → src/arm/emitter-thumb.h

@@ -13,17 +13,17 @@ DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 10), \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, NAME ## 11)
 
 #define DECLARE_THUMB_EMITTER_BLOCK(EMITTER) \
-	APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSL1_)) \
-	APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LSR1_)) \
-	APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ASR1_)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD3_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB3_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD1_)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB1_)) \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, MOV1_R)) \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, CMP1_R)) \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD2_R)) \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB2_R)) \
+	APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LSL1_)) \
+	APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LSR1_)) \
+	APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, ASR1_)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD3_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB3_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD1_)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB1_)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, MOV1_R)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, CMP1_R)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD2_R)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, SUB2_R)) \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, AND), \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, EOR), \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, LSL2), \
@@ -47,25 +47,25 @@ DECLARE_INSTRUCTION_THUMB(EMITTER, BX), \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, BX), \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, ILL), \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR3_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STR2_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH2_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB2_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSB_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR2_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH2_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB2_R)) \
-	APPLY(COUNT_3, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSH_R)) \
-	APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STR1_)) \
-	APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR1_)) \
-	APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB1_)) \
-	APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB1_)) \
-	APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH1_)) \
-	APPLY(COUNT_5, DUMMY, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH1_)) \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, STR3_R)) \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR4_R)) \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD5_R)) \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD6_R)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR3_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STR2_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH2_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB2_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSB_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR2_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH2_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB2_R)) \
+	APPLY(COUNT_3, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRSH_R)) \
+	APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STR1_)) \
+	APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR1_)) \
+	APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STRB1_)) \
+	APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRB1_)) \
+	APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, STRH1_)) \
+	APPLY(COUNT_5, ECHO, DECLARE_INSTRUCTION_THUMB(EMITTER, LDRH1_)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, STR3_R)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDR4_R)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD5_R)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, ADD6_R)) \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, ADD7), \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, ADD7), \
 	DECLARE_INSTRUCTION_THUMB(EMITTER, SUB4), \
@@ -82,8 +82,8 @@ DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, POP)), \
 	DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, POPR)), \
 	DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BKPT)), \
 	DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, ILL)), \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, STMIA_R)) \
-	APPLY(COUNT_3, DUMMY_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDMIA_R)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, STMIA_R)) \
+	APPLY(COUNT_3, ECHO_4, DECLARE_INSTRUCTION_THUMB(EMITTER, LDMIA_R)) \
 	DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BEQ)), \
 	DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BNE)), \
 	DO_4(DECLARE_INSTRUCTION_THUMB(EMITTER, BCS)), \

M src/arm/isa-thumb.c → src/arm/isa-thumb.c

@@ -54,7 +54,7 @@ int rm = (opcode >> 3) & 0x0007; \
 		BODY;)
 
 #define DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(NAME, BODY) \
-	COUNT_5(DEFINE_IMMEDIATE_5_INSTRUCTION_EX_THUMB, NAME ## _, BODY)
+	COUNT_CALL_5(DEFINE_IMMEDIATE_5_INSTRUCTION_EX_THUMB, NAME ## _, BODY)
 
 DEFINE_IMMEDIATE_5_INSTRUCTION_THUMB(LSL1,
 	if (!immediate) {
@@ -104,7 +104,7 @@ int rn = (opcode >> 3) & 0x0007; \
 		BODY;)
 
 #define DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(NAME, BODY) \
-	COUNT_3(DEFINE_DATA_FORM_1_INSTRUCTION_EX_THUMB, NAME ## 3_R, BODY)
+	COUNT_CALL_3(DEFINE_DATA_FORM_1_INSTRUCTION_EX_THUMB, NAME ## 3_R, BODY)
 
 DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(ADD, THUMB_ADDITION(cpu->gprs[rd], cpu->gprs[rn], cpu->gprs[rm]))
 DEFINE_DATA_FORM_1_INSTRUCTION_THUMB(SUB, THUMB_SUBTRACTION(cpu->gprs[rd], cpu->gprs[rn], cpu->gprs[rm]))
@@ -117,7 +117,7 @@ int rn = (opcode >> 3) & 0x0007; \
 		BODY;)
 
 #define DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(NAME, BODY) \
-	COUNT_3(DEFINE_DATA_FORM_2_INSTRUCTION_EX_THUMB, NAME ## 1_, BODY)
+	COUNT_CALL_3(DEFINE_DATA_FORM_2_INSTRUCTION_EX_THUMB, NAME ## 1_, BODY)
 
 DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(ADD, THUMB_ADDITION(cpu->gprs[rd], cpu->gprs[rn], immediate))
 DEFINE_DATA_FORM_2_INSTRUCTION_THUMB(SUB, THUMB_SUBTRACTION(cpu->gprs[rd], cpu->gprs[rn], immediate))
@@ -129,7 +129,7 @@ int immediate = opcode & 0x00FF; \
 		BODY;)
 
 #define DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(NAME, BODY) \
-	COUNT_3(DEFINE_DATA_FORM_3_INSTRUCTION_EX_THUMB, NAME ## _R, BODY)
+	COUNT_CALL_3(DEFINE_DATA_FORM_3_INSTRUCTION_EX_THUMB, NAME ## _R, BODY)
 
 DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(ADD2, THUMB_ADDITION(cpu->gprs[rd], cpu->gprs[rd], immediate))
 DEFINE_DATA_FORM_3_INSTRUCTION_THUMB(CMP1, int aluOut = cpu->gprs[rd] - immediate; THUMB_SUBTRACTION_S(cpu->gprs[rd], immediate, aluOut))
@@ -259,7 +259,7 @@ int immediate = (opcode & 0x00FF) << 2; \
 		BODY;)
 
 #define DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(NAME, BODY) \
-	COUNT_3(DEFINE_IMMEDIATE_WITH_REGISTER_EX_THUMB, NAME ## _R, BODY)
+	COUNT_CALL_3(DEFINE_IMMEDIATE_WITH_REGISTER_EX_THUMB, NAME ## _R, BODY)
 
 DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(LDR3, cpu->gprs[rd] = cpu->memory.load32(cpu, (cpu->gprs[ARM_PC] & 0xFFFFFFFC) + immediate, &currentCycles))
 DEFINE_IMMEDIATE_WITH_REGISTER_THUMB(LDR4, cpu->gprs[rd] = cpu->memory.load32(cpu, cpu->gprs[ARM_SP] + immediate, &currentCycles))
@@ -276,7 +276,7 @@ int rn = (opcode >> 3) & 0x0007; \
 		BODY;)
 
 #define DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(NAME, BODY) \
-	COUNT_3(DEFINE_LOAD_STORE_WITH_REGISTER_EX_THUMB, NAME ## _R, BODY)
+	COUNT_CALL_3(DEFINE_LOAD_STORE_WITH_REGISTER_EX_THUMB, NAME ## _R, BODY)
 
 DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDR2, cpu->gprs[rd] = cpu->memory.load32(cpu, cpu->gprs[rn] + cpu->gprs[rm], &currentCycles))
 DEFINE_LOAD_STORE_WITH_REGISTER_THUMB(LDRB2, cpu->gprs[rd] = cpu->memory.loadU8(cpu, cpu->gprs[rn] + cpu->gprs[rm], &currentCycles))
@@ -309,7 +309,7 @@ currentCycles += cpu->memory.waitMultiple(cpu, address, total); \
 		WRITEBACK;)
 
 #define DEFINE_LOAD_STORE_MULTIPLE_THUMB(NAME, BODY, WRITEBACK) \
-	COUNT_3(DEFINE_LOAD_STORE_MULTIPLE_EX_THUMB, NAME ## _R, cpu->gprs[rn], (m = 0x01, i = 0; i < 8; m <<= 1, ++i), BODY, +=, , , WRITEBACK)
+	COUNT_CALL_3(DEFINE_LOAD_STORE_MULTIPLE_EX_THUMB, NAME ## _R, cpu->gprs[rn], (m = 0x01, i = 0; i < 8; m <<= 1, ++i), BODY, +=, , , WRITEBACK)
 
 DEFINE_LOAD_STORE_MULTIPLE_THUMB(LDMIA,
 	cpu->gprs[i] = cpu->memory.load32(cpu, address, 0),