git rekt — mgba.git: e96da4c7b957d687b6580206749007e9fa14e17d

LR35902: Simplify pipeline

Jeffrey Pfau jeffrey@endrift.com

Fri, 15 Jan 2016 02:14:47 -0800

commit

e96da4c7b957d687b6580206749007e9fa14e17d

parent

0bfbc2079e4ec38e247cb6297ad7530d379a9a5a

3 files changed, 24 insertions(+), 37 deletions(-)

jump to

src/lr35902/isa-lr35902.c

src/lr35902/lr35902.c

src/lr35902/lr35902.h

M src/lr35902/isa-lr35902.c → src/lr35902/isa-lr35902.c

@@ -80,7 +80,7 @@
 DEFINE_INSTRUCTION_LR35902(CALLUpdateSPH,
 	cpu->index = cpu->sp + 1;
 	cpu->bus = (cpu->pc + 2) >> 8;
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE;
+	cpu->executionState = LR35902_CORE_MEMORY_STORE;
 	cpu->instruction = _LR35902InstructionCALLUpdateSPL;)
 
 #define DEFINE_CALL_INSTRUCTION_LR35902(CONDITION_NAME, CONDITION) \
@@ -90,7 +90,7 @@ if (CONDITION) { \
 			cpu->sp -= 2; \
 			cpu->index = cpu->sp; \
 			cpu->bus = cpu->pc + 2; \
-			cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+			cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 			cpu->instruction = _LR35902InstructionCALLUpdateSPH; \
 		} else { \
 			cpu->executionState = LR35902_CORE_READ_PC; \
@@ -110,7 +110,7 @@ DEFINE_INSTRUCTION_LR35902(RETUpdateSPH,
 	if (cpu->condition) {
 		cpu->index = cpu->sp + 1;
 		cpu->pc = cpu->bus;
-		cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_LOAD;
+		cpu->executionState = LR35902_CORE_MEMORY_LOAD;
 		cpu->instruction = _LR35902InstructionRETUpdateSPL;
 	})
 
@@ -118,7 +118,7 @@ #define DEFINE_RET_INSTRUCTION_LR35902(CONDITION_NAME, CONDITION) \
 	DEFINE_INSTRUCTION_LR35902(RET ## CONDITION_NAME, \
 		cpu->condition = CONDITION; \
 		cpu->index = cpu->sp; \
-		cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_LOAD; \
+		cpu->executionState = LR35902_CORE_MEMORY_LOAD; \
 		cpu->instruction = _LR35902InstructionRETUpdateSPH;)
 
 DEFINE_CONDITIONAL_INSTRUCTION_LR35902(RET)
@@ -182,7 +182,7 @@
 #define DEFINE_LDHL__INSTRUCTION_LR35902(NAME, OPERAND) \
 	DEFINE_INSTRUCTION_LR35902(LDHL_ ## NAME, \
 		cpu->bus = OPERAND; \
-		cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+		cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 		cpu->instruction = _LR35902InstructionLDHL_Bus;)
 
 #define DEFINE_LDA__INSTRUCTION_LR35902(NAME, OPERAND) \
@@ -200,7 +200,7 @@ DEFINE_ ## NAME ## _INSTRUCTION_LR35902(L, cpu->l);
 
 DEFINE_INSTRUCTION_LR35902(LDHL_Bus, \
 	cpu->index = LR35902ReadHL(cpu); \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+	cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 	cpu->instruction = _LR35902InstructionNOP;)
 
 DEFINE_INSTRUCTION_LR35902(LDHL_, \
@@ -210,7 +210,7 @@
 #define DEFINE_ALU_INSTRUCTION_LR35902(NAME) \
 	DEFINE_ ## NAME ## _INSTRUCTION_LR35902(Bus, cpu->bus); \
 	DEFINE_INSTRUCTION_LR35902(NAME ## HL, \
-		cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_LOAD; \
+		cpu->executionState = LR35902_CORE_MEMORY_LOAD; \
 		cpu->index = LR35902ReadHL(cpu); \
 		cpu->instruction = _LR35902Instruction ## NAME ## Bus;) \
 	DEFINE_INSTRUCTION_LR35902(NAME, \
@@ -253,7 +253,7 @@
 DEFINE_INSTRUCTION_LR35902(LDBC_A, \
 	cpu->index = LR35902ReadBC(cpu); \
 	cpu->bus = cpu->a; \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+	cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 	cpu->instruction = _LR35902InstructionNOP;)
 
 DEFINE_INSTRUCTION_LR35902(LDDEDelay, \
@@ -268,7 +268,7 @@
 DEFINE_INSTRUCTION_LR35902(LDDE_A, \
 	cpu->index = LR35902ReadDE(cpu); \
 	cpu->bus = cpu->a; \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+	cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 	cpu->instruction = _LR35902InstructionNOP;)
 
 DEFINE_INSTRUCTION_LR35902(LDHLDelay, \
@@ -295,20 +295,20 @@ DEFINE_INSTRUCTION_LR35902(LDIHLA, \
 	cpu->index = LR35902ReadHL(cpu); \
 	LR35902WriteHL(cpu, cpu->index + 1); \
 	cpu->bus = cpu->a; \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+	cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 	cpu->instruction = _LR35902InstructionNOP;)
 
 DEFINE_INSTRUCTION_LR35902(LDDHLA, \
 	cpu->index = LR35902ReadHL(cpu); \
 	LR35902WriteHL(cpu, cpu->index - 1); \
 	cpu->bus = cpu->a; \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+	cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 	cpu->instruction = _LR35902InstructionNOP;)
 
 DEFINE_INSTRUCTION_LR35902(LDIAFinish, \
 	cpu->index |= cpu->bus << 8;
 	cpu->bus = cpu->a; \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+	cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 	cpu->instruction = _LR35902InstructionNOP;)
 
 DEFINE_INSTRUCTION_LR35902(LDIADelay, \
@@ -322,7 +322,7 @@ cpu->instruction = _LR35902InstructionLDIADelay;)
 
 DEFINE_INSTRUCTION_LR35902(LDAIFinish, \
 	cpu->index |= cpu->bus << 8;
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_LOAD; \
+	cpu->executionState = LR35902_CORE_MEMORY_LOAD; \
 	cpu->instruction = _LR35902InstructionLDA_Bus;)
 
 DEFINE_INSTRUCTION_LR35902(LDAIDelay, \
@@ -336,18 +336,18 @@ cpu->instruction = _LR35902InstructionLDAIDelay;)
 
 DEFINE_INSTRUCTION_LR35902(LDAIOC, \
 	cpu->index = 0xFF00 | cpu->c; \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_LOAD; \
+	cpu->executionState = LR35902_CORE_MEMORY_LOAD; \
 	cpu->instruction = _LR35902InstructionLDA_Bus;)
 
 DEFINE_INSTRUCTION_LR35902(LDIOCA, \
 	cpu->index = 0xFF00 | cpu->c; \
 	cpu->bus = cpu->a; \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+	cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 	cpu->instruction = _LR35902InstructionNOP;)
 
 DEFINE_INSTRUCTION_LR35902(LDAIODelay, \
 	cpu->index = 0xFF00 | cpu->bus; \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_LOAD; \
+	cpu->executionState = LR35902_CORE_MEMORY_LOAD; \
 	cpu->instruction = _LR35902InstructionLDA_Bus;)
 
 DEFINE_INSTRUCTION_LR35902(LDAIO, \
@@ -357,7 +357,7 @@
 DEFINE_INSTRUCTION_LR35902(LDIOADelay, \
 	cpu->index = 0xFF00 | cpu->bus; \
 	cpu->bus = cpu->a; \
-	cpu->executionState = LR35902_CORE_MEMORY_MOVE_INDEX_STORE; \
+	cpu->executionState = LR35902_CORE_MEMORY_STORE; \
 	cpu->instruction = _LR35902InstructionNOP;)
 
 DEFINE_INSTRUCTION_LR35902(LDIOA, \

M src/lr35902/lr35902.c → src/lr35902/lr35902.c

@@ -88,8 +88,6 @@ cpu->irqh.setInterrupts(cpu, false);
 			// TODO: stall
 		}
 		cpu->bus = cpu->memory.load8(cpu, cpu->pc);
-		break;
-	case LR35902_CORE_DECODE:
 		cpu->instruction = _lr35902InstructionTable[cpu->bus];
 		++cpu->pc;
 		break;
@@ -105,16 +103,8 @@ break;
 	case LR35902_CORE_READ_PC:
 		cpu->bus = cpu->memory.load8(cpu, cpu->pc);
 		++cpu->pc;
-		cpu->executionState = LR35902_CORE_READ_PC_STALL;
 		break;
-	case LR35902_CORE_MEMORY_MOVE_INDEX_LOAD:
-		cpu->executionState = LR35902_CORE_MEMORY_LOAD;
-		break;
-	case LR35902_CORE_MEMORY_MOVE_INDEX_STORE:
-		cpu->executionState = LR35902_CORE_MEMORY_STORE;
-		break;
-	case LR35902_CORE_READ_PC_STALL:
-	case LR35902_CORE_STALL:
+	default:
 		break;
 	}
 	if (cpu->cycles >= cpu->nextEvent) {

M src/lr35902/lr35902.h → src/lr35902/lr35902.h

@@ -36,16 +36,13 @@ #pragma pack(pop, 1)
 
 enum LR35902ExecutionState {
 	LR35902_CORE_FETCH = 0,
-	LR35902_CORE_DECODE,
-	LR35902_CORE_STALL,
-	LR35902_CORE_EXECUTE,
+	LR35902_CORE_IDLE_0,
+	LR35902_CORE_IDLE_1,
+	LR35902_CORE_EXECUTE = 3,
 
-	LR35902_CORE_MEMORY_LOAD = 5,
-	LR35902_CORE_MEMORY_STORE = 9,
-	LR35902_CORE_MEMORY_MOVE_INDEX_LOAD,
-	LR35902_CORE_MEMORY_MOVE_INDEX_STORE,
-	LR35902_CORE_READ_PC,
-	LR35902_CORE_READ_PC_STALL,
+	LR35902_CORE_MEMORY_LOAD = 4,
+	LR35902_CORE_MEMORY_STORE = 8,
+	LR35902_CORE_READ_PC = 12,
 };
 
 struct LR35902Memory {

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