M src/gb/mbc.c → src/gb/mbc.c

@@ -531,7 +531,7 @@ }
 
 void _GBMBC6(struct GB* gb, uint16_t address, uint8_t value) {
 	struct GBMemory* memory = &gb->memory;
-	int bank = value & 0x7F;
+	int bank = value;
 	switch (address >> 10) {
 	case 0:
 		switch (value) {
@@ -548,9 +548,11 @@ mLOG(GB_MBC, STUB, "MBC6 unknown value %02X", value);
 			break;
 		}
 		break;
+	case 0x8:
 	case 0x9:
 		GBMBCSwitchHalfBank(gb, 0, bank);
 		break;
+	case 0xC:
 	case 0xD:
 		GBMBCSwitchHalfBank(gb, 1, bank);
 		break;

M src/gb/memory.c → src/gb/memory.c

@@ -73,9 +73,20 @@ case GB_REGION_CART_BANK1 + 1:
 	case GB_REGION_CART_BANK1 + 2:
 	case GB_REGION_CART_BANK1 + 3:
 		cpu->memory.cpuLoad8 = GBFastLoad8;
-		cpu->memory.activeRegion = memory->romBank;
-		cpu->memory.activeRegionEnd = GB_BASE_VRAM;
-		cpu->memory.activeMask = GB_SIZE_CART_BANK0 - 1;
+		if (gb->memory.mbcType != GB_MBC6) {
+			cpu->memory.activeRegion = memory->romBank;
+			cpu->memory.activeRegionEnd = GB_BASE_VRAM;
+			cpu->memory.activeMask = GB_SIZE_CART_BANK0 - 1;
+		} else {
+			cpu->memory.activeMask = GB_SIZE_CART_HALFBANK - 1;
+			if (address & 0x2000) {
+				cpu->memory.activeRegion = memory->mbcState.mbc6.romBank1;
+				cpu->memory.activeRegionEnd = GB_BASE_VRAM;
+			} else {
+				cpu->memory.activeRegion = memory->romBank;
+				cpu->memory.activeRegionEnd = GB_BASE_CART_BANK1 + 0x2000;
+			}
+		}
 		break;
 	default:
 		cpu->memory.cpuLoad8 = GBLoad8;
@@ -168,6 +179,10 @@ memset(&gb->memory.hram, 0, sizeof(gb->memory.hram));
 	switch (gb->memory.mbcType) {
 	case GB_MBC1:
 		gb->memory.mbcState.mbc1.mode = 0;
+		break;
+	case GB_MBC6:
+		GBMBCSwitchHalfBank(gb, 0, 2);
+		GBMBCSwitchHalfBank(gb, 1, 3);
 		break;
 	default:
 		memset(&gb->memory.mbcState, 0, sizeof(gb->memory.mbcState));