DS I/O: Add DMA FILL registers
Vicki Pfau vi@endrift.com
Mon, 30 Jan 2017 16:24:01 -0800
2 files changed,
35 insertions(+),
0 deletions(-)
M
include/mgba/internal/ds/io.h
→
include/mgba/internal/ds/io.h
@@ -38,6 +38,14 @@ DS_REG_DMA3DAD_LO = 0x0D8,
DS_REG_DMA3DAD_HI = 0x0DA, DS_REG_DMA3CNT_LO = 0x0DC, DS_REG_DMA3CNT_HI = 0x0DE, + DS_REG_DMA0FILL_LO = 0x0E0, + DS_REG_DMA0FILL_HI = 0x0E2, + DS_REG_DMA1FILL_LO = 0x0E4, + DS_REG_DMA1FILL_HI = 0x0E6, + DS_REG_DMA2FILL_LO = 0x0E8, + DS_REG_DMA2FILL_HI = 0x0EA, + DS_REG_DMA3FILL_LO = 0x0EC, + DS_REG_DMA3FILL_HI = 0x0EE, // Timers DS_REG_TM0CNT_LO = 0x100,
M
src/ds/io.c
→
src/ds/io.c
@@ -29,6 +29,17 @@ }
static uint32_t DSIOWrite(struct DSCommon* dscore, uint32_t address, uint16_t value) { switch (address) { + // DMA Fill + case DS_REG_DMA0FILL_LO: + case DS_REG_DMA0FILL_HI: + case DS_REG_DMA1FILL_LO: + case DS_REG_DMA1FILL_HI: + case DS_REG_DMA2FILL_LO: + case DS_REG_DMA2FILL_HI: + case DS_REG_DMA3FILL_LO: + case DS_REG_DMA3FILL_HI: + break; + // Timers case DS_REG_TM0CNT_LO: GBATimerWriteTMCNT_LO(&dscore->timers[0], value);@@ -202,6 +213,14 @@ case DS_REG_TM2CNT_LO:
case DS_REG_TM3CNT_LO: DSIOUpdateTimer(&ds->ds7, address); break; + case DS_REG_DMA0FILL_LO: + case DS_REG_DMA0FILL_HI: + case DS_REG_DMA1FILL_LO: + case DS_REG_DMA1FILL_HI: + case DS_REG_DMA2FILL_LO: + case DS_REG_DMA2FILL_HI: + case DS_REG_DMA3FILL_LO: + case DS_REG_DMA3FILL_HI: case DS_REG_TM0CNT_HI: case DS_REG_TM1CNT_HI: case DS_REG_TM2CNT_HI:@@ -333,6 +352,14 @@ case DS_REG_TM2CNT_LO:
case DS_REG_TM3CNT_LO: DSIOUpdateTimer(&ds->ds9, address); break; + case DS_REG_DMA0FILL_LO: + case DS_REG_DMA0FILL_HI: + case DS_REG_DMA1FILL_LO: + case DS_REG_DMA1FILL_HI: + case DS_REG_DMA2FILL_LO: + case DS_REG_DMA2FILL_HI: + case DS_REG_DMA3FILL_LO: + case DS_REG_DMA3FILL_HI: case DS_REG_TM0CNT_HI: case DS_REG_TM1CNT_HI: case DS_REG_TM2CNT_HI: