M src/lr35902/emitter-lr35902.h → src/lr35902/emitter-lr35902.h

@@ -19,7 +19,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, DECB), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, LDB_), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
-	DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
+	DECLARE_INSTRUCTION_LR35902(EMITTER, ADDHL_BC), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_BC), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, DECBC), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, INCC), \
@@ -35,7 +35,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, DECD), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, LDD_), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, JR), \
-	DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
+	DECLARE_INSTRUCTION_LR35902(EMITTER, ADDHL_DE), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_DE), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, DECDE), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, INCE), \
@@ -51,7 +51,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, DECH), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, LDH_), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, JRZ), \
-	DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
+	DECLARE_INSTRUCTION_LR35902(EMITTER, ADDHL_HL), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_IHL), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, DECHL), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, INCL), \
@@ -67,7 +67,7 @@ DECLARE_INSTRUCTION_LR35902(EMITTER, DEC_HL), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, LDHL_), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, JRC), \
-	DECLARE_INSTRUCTION_LR35902(EMITTER, STUB), \
+	DECLARE_INSTRUCTION_LR35902(EMITTER, ADDHL_SP), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, LDA_DHL), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, DECSP), \
 	DECLARE_INSTRUCTION_LR35902(EMITTER, INCA), \

M src/lr35902/isa-lr35902.c → src/lr35902/isa-lr35902.c

@@ -435,6 +435,25 @@ DEFINE_INCDEC_WIDE_INSTRUCTION_LR35902(BC);
 DEFINE_INCDEC_WIDE_INSTRUCTION_LR35902(DE);
 DEFINE_INCDEC_WIDE_INSTRUCTION_LR35902(HL);
 
+#define DEFINE_ADD_HL_INSTRUCTION_LR35902(REG, L, H) \
+	DEFINE_INSTRUCTION_LR35902(ADDHL_ ## REG ## Finish, \
+		int diff = H + cpu->h + cpu->f.c; \
+		cpu->h = diff; \
+		cpu->f.c = diff >= 0x100; \
+		cpu->f.n = 0; \
+		/* TODO: Find explanation of H flag */) \
+	DEFINE_INSTRUCTION_LR35902(ADDHL_ ## REG, \
+		int diff = L + cpu->l; \
+		cpu->l = diff; \
+		cpu->f.c = diff >= 0x100; \
+		cpu->executionState = LR35902_CORE_STALL; \
+		cpu->instruction = _LR35902InstructionADDHL_ ## REG ## Finish;)
+
+DEFINE_ADD_HL_INSTRUCTION_LR35902(BC, cpu->c, cpu->b);
+DEFINE_ADD_HL_INSTRUCTION_LR35902(DE, cpu->e, cpu->d);
+DEFINE_ADD_HL_INSTRUCTION_LR35902(HL, cpu->l, cpu->h);
+DEFINE_ADD_HL_INSTRUCTION_LR35902(SP, (cpu->sp & 0xFF), (cpu->sp >> 8));
+
 
 #define DEFINE_INC_INSTRUCTION_LR35902(NAME, OPERAND) \
 	DEFINE_INSTRUCTION_LR35902(INC ## NAME, \
@@ -505,7 +524,6 @@ ++cpu->sp; \
 		cpu->instruction = _LR35902InstructionPOP ## REG ## Delay; \
 		cpu->executionState = LR35902_CORE_MEMORY_LOAD;) \
 	DEFINE_INSTRUCTION_LR35902(PUSH ## REG ## Finish, \
-		cpu->instruction = _LR35902InstructionNOP; \
 		cpu->executionState = LR35902_CORE_STALL;) \
 	DEFINE_INSTRUCTION_LR35902(PUSH ## REG ## Delay, \
 		--cpu->sp; \

M src/lr35902/lr35902.h → src/lr35902/lr35902.h

@@ -43,7 +43,8 @@
 	LR35902_CORE_MEMORY_LOAD = 4,
 	LR35902_CORE_MEMORY_STORE = 8,
 	LR35902_CORE_READ_PC = 12,
-	LR35902_CORE_STALL = 16
+	LR35902_CORE_STALL = 16,
+	LR35902_CORE_OP2 = 20
 };
 
 struct LR35902Memory {