M src/arm.c → src/arm.c

@@ -122,6 +122,9 @@ #define ARM_COND_GT (!cpu->cpsr.z && !cpu->cpsr.n == !cpu->cpsr.v)
 #define ARM_COND_LE (cpu->cpsr.z || !cpu->cpsr.n != !cpu->cpsr.v)
 #define ARM_COND_AL 1
 
+#define ARM_WRITE_PC \
+	cpu->gprs[ARM_PC] = (cpu->gprs[ARM_PC] & -cpu->instructionWidth) + cpu->instructionWidth
+
 #define ARM_ADDITION_S(M, N, D) \
 	if (rd == ARM_PC && _ARMModeHasSPSR(cpu->cpsr.priv)) { \
 		cpu->cpsr = cpu->spsr; \
@@ -380,7 +383,8 @@
 DEFINE_INSTRUCTION_ARM(B, \
 	int32_t offset = opcode << 8; \
 	offset >>= 6; \
-	cpu->gprs[ARM_PC] += offset)
+	cpu->gprs[ARM_PC] += offset; \
+	ARM_WRITE_PC;)
 
 DEFINE_INSTRUCTION_ARM(BL,)
 DEFINE_INSTRUCTION_ARM(BX,)

M src/main.c → src/main.c

@@ -11,6 +11,7 @@ int fd = open("test.rom", O_RDONLY);
 	GBALoadROM(&gba, fd);
 	gba.cpu.gprs[ARM_PC] = 0x08000004;
 	ARMStep(&gba.cpu);
+	ARMStep(&gba.cpu);
 	GBADeinit(&gba);
 
 	return 0;