M CHANGES → CHANGES

@@ -6,6 +6,7 @@ - GB Video: Only trigger STAT write IRQs when screen is on (fixes mgba.io/i/912)
  - GBA Cheats: Fix PARv3 slide codes (fixes mgba.io/i/919)
  - GBA Video: OBJWIN can change blend params after OBJ is drawn (fixes mgba.io/i/921)
  - GBA Savedata: Fix crash when resizing flash
+ - GB Memory: HDMAs should not start when LCD is off (fixes mgba.io/i/310)
 Misc:
  - GBA: Improve multiboot image detection
  - GB MBC: Remove erroneous bank 0 wrapping

M include/mgba/internal/gb/memory.h → include/mgba/internal/gb/memory.h

@@ -177,7 +177,7 @@
 uint8_t GBView8(struct LR35902Core* cpu, uint16_t address, int segment);
 
 void GBMemoryDMA(struct GB* gb, uint16_t base);
-void GBMemoryWriteHDMA5(struct GB* gb, uint8_t value);
+uint8_t GBMemoryWriteHDMA5(struct GB* gb, uint8_t value);
 
 void GBPatch8(struct LR35902Core* cpu, uint16_t address, int8_t value, int8_t* old, int segment);
 

M src/gb/io.c → src/gb/io.c

@@ -410,8 +410,7 @@ case REG_HDMA4:
 				// Handled transparently by the registers
 				break;
 			case REG_HDMA5:
-				GBMemoryWriteHDMA5(gb, value);
-				value &= 0x7F;
+				value = GBMemoryWriteHDMA5(gb, value);
 				break;
 			case REG_BCPS:
 				gb->video.bcpIndex = value & 0x3F;

M src/gb/memory.c → src/gb/memory.c

@@ -449,7 +449,7 @@ gb->memory.dmaDest = 0;
 	gb->memory.dmaRemaining = 0xA0;
 }
 
-void GBMemoryWriteHDMA5(struct GB* gb, uint8_t value) {
+uint8_t GBMemoryWriteHDMA5(struct GB* gb, uint8_t value) {
 	gb->memory.hdmaSource = gb->memory.io[REG_HDMA1] << 8;
 	gb->memory.hdmaSource |= gb->memory.io[REG_HDMA2];
 	gb->memory.hdmaDest = gb->memory.io[REG_HDMA3] << 8;
@@ -457,7 +457,7 @@ gb->memory.hdmaDest |= gb->memory.io[REG_HDMA4];
 	gb->memory.hdmaSource &= 0xFFF0;
 	if (gb->memory.hdmaSource >= 0x8000 && gb->memory.hdmaSource < 0xA000) {
 		mLOG(GB_MEM, GAME_ERROR, "Invalid HDMA source: %04X", gb->memory.hdmaSource);
-		return;
+		return value | 0x80;
 	}
 	gb->memory.hdmaDest &= 0x1FF0;
 	gb->memory.hdmaDest |= 0x8000;
@@ -471,7 +471,10 @@ gb->memory.hdmaRemaining = ((value & 0x7F) + 1) * 0x10;
 		}
 		gb->cpuBlocked = true;
 		mTimingSchedule(&gb->timing, &gb->memory.hdmaEvent, 0);
+	} else if (gb->memory.isHdma && !GBRegisterLCDCIsEnable(gb->memory.io[REG_LCDC])) {
+		return 0x80 | ((value + 1) & 0x7F);
 	}
+	return value & 0x7F;
 }
 
 void _GBMemoryDMAService(struct mTiming* timing, void* context, uint32_t cyclesLate) {