M src/arm/decoder.h → src/arm/decoder.h

@@ -9,55 +9,52 @@ // Bit 2: a memory access is invovled with this operand
 // Bit 3: the destination of this operand is affected by this opcode
 // Bit 4: this operand is shifted by a register
 // Bit 5: this operand is shifted by an immediate
-enum ARMOperandFormat {
-	ARM_OPERAND_NONE =               0x00000000,
-	ARM_OPERAND_REGISTER_1 =         0x00000001,
-	ARM_OPERAND_IMMEDIATE_1 =        0x00000002,
-	ARM_OPERAND_MEMORY_1 =           0x00000004,
-	ARM_OPERAND_AFFECTED_1 =         0x00000008,
-	ARM_OPERAND_SHIFT_REGISTER_1 =   0x00000010,
-	ARM_OPERAND_SHIFT_IMMEDIATE_1 =  0x00000020,
-	ARM_OPERAND_1 =                  0x000000FF,
+#define ARM_OPERAND_NONE                0x00000000
+#define ARM_OPERAND_REGISTER_1          0x00000001
+#define ARM_OPERAND_IMMEDIATE_1         0x00000002
+#define ARM_OPERAND_MEMORY_1            0x00000004
+#define ARM_OPERAND_AFFECTED_1          0x00000008
+#define ARM_OPERAND_SHIFT_REGISTER_1    0x00000010
+#define ARM_OPERAND_SHIFT_IMMEDIATE_1   0x00000020
+#define ARM_OPERAND_1                   0x000000FF
 
-	ARM_OPERAND_REGISTER_2 =         0x00000100,
-	ARM_OPERAND_IMMEDIATE_2 =        0x00000200,
-	ARM_OPERAND_MEMORY_2 =           0x00000400,
-	ARM_OPERAND_AFFECTED_2 =         0x00000800,
-	ARM_OPERAND_SHIFT_REGISTER_2 =   0x00001000,
-	ARM_OPERAND_SHIFT_IMMEDIATE_2 =  0x00002000,
-	ARM_OPERAND_2 =                  0x0000FF00,
+#define ARM_OPERAND_REGISTER_2          0x00000100
+#define ARM_OPERAND_IMMEDIATE_2         0x00000200
+#define ARM_OPERAND_MEMORY_2            0x00000400
+#define ARM_OPERAND_AFFECTED_2          0x00000800
+#define ARM_OPERAND_SHIFT_REGISTER_2    0x00001000
+#define ARM_OPERAND_SHIFT_IMMEDIATE_2   0x00002000
+#define ARM_OPERAND_2                   0x0000FF00
 
-	ARM_OPERAND_REGISTER_3 =         0x00010000,
-	ARM_OPERAND_IMMEDIATE_3 =        0x00020000,
-	ARM_OPERAND_MEMORY_3 =           0x00040000,
-	ARM_OPERAND_AFFECTED_3 =         0x00080000,
-	ARM_OPERAND_SHIFT_REGISTER_3 =   0x00100000,
-	ARM_OPERAND_SHIFT_IMMEDIATE_3 =  0x00200000,
-	ARM_OPERAND_3 =                  0x00FF0000,
+#define ARM_OPERAND_REGISTER_3          0x00010000
+#define ARM_OPERAND_IMMEDIATE_3         0x00020000
+#define ARM_OPERAND_MEMORY_3            0x00040000
+#define ARM_OPERAND_AFFECTED_3          0x00080000
+#define ARM_OPERAND_SHIFT_REGISTER_3    0x00100000
+#define ARM_OPERAND_SHIFT_IMMEDIATE_3   0x00200000
+#define ARM_OPERAND_3                   0x00FF0000
+
+#define ARM_OPERAND_REGISTER_4          0x01000000
+#define ARM_OPERAND_IMMEDIATE_4         0x02000000
+#define ARM_OPERAND_MEMORY_4            0x04000000
+#define ARM_OPERAND_AFFECTED_4          0x08000000
+#define ARM_OPERAND_SHIFT_REGISTER_4    0x10000000
+#define ARM_OPERAND_SHIFT_IMMEDIATE_4   0x20000000
+#define ARM_OPERAND_4                   0xFF000000
 
-	ARM_OPERAND_REGISTER_4 =         0x01000000,
-	ARM_OPERAND_IMMEDIATE_4 =        0x02000000,
-	ARM_OPERAND_MEMORY_4 =           0x04000000,
-	ARM_OPERAND_AFFECTED_4 =         0x08000000,
-	ARM_OPERAND_SHIFT_REGISTER_4 =   0x10000000,
-	ARM_OPERAND_SHIFT_IMMEDIATE_4 =  0x20000000,
-	ARM_OPERAND_4 =                  0xFF000000
-};
 
-enum ARMMemoryFormat {
-	ARM_MEMORY_REGISTER_BASE =    0x0001,
-	ARM_MEMORY_IMMEDIATE_OFFSET = 0x0002,
-	ARM_MEMORY_REGISTER_OFFSET  = 0x0004,
-	ARM_MEMORY_SHIFTED_OFFSET =   0x0008,
-	ARM_MEMORY_PRE_INCREMENT =    0x0010,
-	ARM_MEMORY_POST_INCREMENT =   0x0020,
-	ARM_MEMORY_OFFSET_SUBTRACT =  0x0040,
-	ARM_MEMORY_WRITEBACK =        0x0080,
-	ARM_MEMORY_DECREMENT_AFTER =  0x0000,
-	ARM_MEMORY_INCREMENT_AFTER =  0x0100,
-	ARM_MEMORY_DECREMENT_BEFORE = 0x0200,
-	ARM_MEMORY_INCREMENT_BEFORE = 0x0300,
-};
+#define ARM_MEMORY_REGISTER_BASE     0x0001
+#define ARM_MEMORY_IMMEDIATE_OFFSET  0x0002
+#define ARM_MEMORY_REGISTER_OFFSET   0x0004
+#define ARM_MEMORY_SHIFTED_OFFSET    0x0008
+#define ARM_MEMORY_PRE_INCREMENT     0x0010
+#define ARM_MEMORY_POST_INCREMENT    0x0020
+#define ARM_MEMORY_OFFSET_SUBTRACT   0x0040
+#define ARM_MEMORY_WRITEBACK         0x0080
+#define ARM_MEMORY_DECREMENT_AFTER   0x0000
+#define ARM_MEMORY_INCREMENT_AFTER   0x0100
+#define ARM_MEMORY_DECREMENT_BEFORE  0x0200
+#define ARM_MEMORY_INCREMENT_BEFORE  0x0300
 
 #define MEMORY_FORMAT_TO_DIRECTION(F) (((F) >> 8) & 0x7)
 

M src/arm/isa-arm.c → src/arm/isa-arm.c

@@ -4,11 +4,9 @@ #include "arm.h"
 #include "emitter-arm.h"
 #include "isa-inlines.h"
 
-enum {
-	PSR_USER_MASK = 0xF0000000,
-	PSR_PRIV_MASK = 0x000000CF,
-	PSR_STATE_MASK = 0x00000020
-};
+#define PSR_USER_MASK   0xF0000000
+#define PSR_PRIV_MASK   0x000000CF
+#define PSR_STATE_MASK  0x00000020
 
 // Addressing mode 1
 static inline void _shiftLSL(struct ARMCore* cpu, uint32_t opcode) {

M src/gba/renderers/video-software.h → src/gba/renderers/video-software.h

@@ -65,17 +65,14 @@ OFFSET_PRIORITY = 30,
 	OFFSET_INDEX = 28,
 };
 
-enum PixelFlags {
-	FLAG_PRIORITY = 0xC0000000,
-	FLAG_INDEX = 0x30000000,
-	FLAG_IS_BACKGROUND = 0x08000000,
-	FLAG_UNWRITTEN = 0xFC000000,
-	FLAG_TARGET_1 = 0x02000000,
-	FLAG_TARGET_2 = 0x01000000,
-	FLAG_OBJWIN = 0x01000000,
-
-	FLAG_ORDER_MASK = 0xF8000000
-};
+#define FLAG_PRIORITY       0xC0000000
+#define FLAG_INDEX          0x30000000
+#define FLAG_IS_BACKGROUND  0x08000000
+#define FLAG_UNWRITTEN      0xFC000000
+#define FLAG_TARGET_1       0x02000000
+#define FLAG_TARGET_2       0x01000000
+#define FLAG_OBJWIN         0x01000000
+#define FLAG_ORDER_MASK     0xF8000000
 
 #define IS_WRITABLE(PIXEL) ((PIXEL) & 0xFE000000)