Macro-insanity for Thumb
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 03:15:50 -0700
Start filling in THUMB table with insane preprocessor tricks
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 02:57:24 -0700
Fix warnings + LDR[B]T/STR[B]T
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 03:14:18 -0700
Load/store working RAM
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 03:13:37 -0700
Loading 8/16 bits from ROM
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 02:13:40 -0700
Ensure CPSR privilege gets updated in MSR
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 00:21:28 -0700
Don't double-execute AL instructions
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 00:17:54 -0700
Implement MSR
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 00:15:16 -0700
Separate out ISA files
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 21:15:32 -0700
Remove inline conditions and add ARM specialization
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 20:37:48 -0700
Start filling in ARMBoard
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 13:25:45 -0700
Mode switching
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 02:36:41 -0700
ALU instructions can write to PC
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 02:01:14 -0700
Fix writing to PC
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:57:04 -0700
Mini-test
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:39:49 -0700
Fix B
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:39:08 -0700
De-inline ARMStep
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:46:48 -0700
GBA ROM loading
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:46:28 -0700
Implement B
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 20:16:14 -0700
Load from ARM table now that we have one
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 20:06:51 -0700
Fill remainder of table
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 20:01:32 -0700
Stub out SWI
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:58:01 -0700
Stub out coprocessor
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:52:45 -0700
Cleanup
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:38:14 -0700
Stub out branch instructions
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:22:14 -0700
Stub out LDM/STM
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 18:41:36 -0700
Fill in LDR/STR block
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 13:05:53 -0700
Simple error checking
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 04:34:19 -0700
Add store callbacks
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 04:20:44 -0700
Partially implement LDR/STR and friends
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 04:16:27 -0700
Apparently I can't count to 8
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 02:49:54 -0700
Filler for more instructions
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 00:32:01 -0700
Begin GBA structure
Jeffrey Pfau jeffrey@endrift.com
Fri, 05 Apr 2013 02:17:22 -0700
Implement immediate shifter
Jeffrey Pfau jeffrey@endrift.com
Fri, 05 Apr 2013 00:43:47 -0700
Fill in immediates
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 03:12:22 -0700
Implement BIC, MOV, MVN, ORR
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:42:17 -0700
Add stubs, including for illegal instructions
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:36:53 -0700
Fill in more opcodes, implement CMN, CMP, TEQ, TST
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:31:32 -0700
Implement ADD, ADC, RSB, RSC, SUB
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:04:51 -0700
Fill in more opcodes, implement EOR
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 01:27:51 -0700
Add boilerplate for instructions
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 00:46:50 -0700
Add more framework for loading instructions
Jeffrey Pfau jeffrey@endrift.com
Wed, 03 Apr 2013 22:34:49 -0700
Initial commit
Jeffrey Pfau jeffrey@endrift.com
Wed, 03 Apr 2013 22:12:15 -0700