Fix BL(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:14:01 -0700
Implement LDR(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:06:17 -0700
Implement STR(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 21:56:46 -0700
Implement STR(3)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 21:48:30 -0700
Implement ADD(2)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 21:48:19 -0700
Command to break into attached debugger
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 21:27:43 -0700
Implement LDR(3)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 20:09:27 -0700
Implement STRH(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 20:06:58 -0700
Implement LSL(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 20:00:14 -0700
Implement ADD(6)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 19:59:55 -0700
Implement MOV(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:44:04 -0700
Implement ADD(7)/SUB(4)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:22:37 -0700
Implement MOV(3)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:15:47 -0700
Set bits in MSR properly
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:10:09 -0700
Print proper register
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:04:51 -0700
Add some basic input to the debugger
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:03:11 -0700
Initial debugger
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 01:32:43 -0700
Move CMakeList
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 23:58:13 -0700
Add linenoise module
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 23:52:51 -0700
Implement BL
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 03:14:09 -0700
Implement LDMIA/STMIA/PUSH/POP
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 03:01:07 -0700
Stub out incomplete addressing mode 1 opcodes
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 02:13:35 -0700
Start fleshing out addressing mode 1
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 01:32:30 -0700
Implement BX
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 00:14:12 -0700
Put stub definitions in all of Thumb
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 23:38:18 -0700
Add ability to run Thumb code
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 23:34:50 -0700
Log stubs
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 22:52:46 -0700
Stub out BL, finishing Thumb table
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 21:11:05 -0700
Stub out B
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 21:09:22 -0700
Stub out SWI
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 21:05:19 -0700
Stub out conditional branches
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 21:04:41 -0700
Stub out LDMIA/STMIA
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 20:58:05 -0700
Stub out BKPT (not in ARMv4T, but still useful)
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 20:50:56 -0700
Stub out POP/PUSH
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 00:00:24 -0700
Stub out ADD7 and SUB4
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:47:37 -0700
Stub out ADD from PC and SP
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:45:08 -0700
Stub out LDR/STR from SP
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:37:28 -0700
Stub out more load/stores with immediates
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:34:25 -0700
Stub out more load/store format 2
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:27:37 -0700
Put in missing BX
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:16:30 -0700
Stub out STR2
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:00:31 -0700
Stub out LDR3
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:57:24 -0700
Stub out format 8
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:51:21 -0700
Define data format 5
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:35:51 -0700
Fix data format 3
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:35:38 -0700
Minor ROM access optimization
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:20:35 -0700
Add data form 3
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 04:20:14 -0700
ADD/SUB 1 stubs
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 03:20:32 -0700
Macro-insanity for Thumb
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 03:15:50 -0700
Start filling in THUMB table with insane preprocessor tricks
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 02:57:24 -0700
Fix warnings + LDR[B]T/STR[B]T
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 03:14:18 -0700
Load/store working RAM
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 03:13:37 -0700
Loading 8/16 bits from ROM
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 02:13:40 -0700
Ensure CPSR privilege gets updated in MSR
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 00:21:28 -0700
Don't double-execute AL instructions
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 00:17:54 -0700
Implement MSR
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 00:15:16 -0700
Separate out ISA files
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 21:15:32 -0700
Remove inline conditions and add ARM specialization
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 20:37:48 -0700
Start filling in ARMBoard
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 13:25:45 -0700
Mode switching
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 02:36:41 -0700
ALU instructions can write to PC
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 02:01:14 -0700
Fix writing to PC
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:57:04 -0700
Mini-test
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:39:49 -0700
Fix B
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:39:08 -0700
De-inline ARMStep
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:46:48 -0700
GBA ROM loading
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:46:28 -0700
Implement B
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 20:16:14 -0700
Load from ARM table now that we have one
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 20:06:51 -0700
Fill remainder of table
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 20:01:32 -0700
Stub out SWI
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:58:01 -0700
Stub out coprocessor
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:52:45 -0700
Cleanup
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:38:14 -0700
Stub out branch instructions
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:22:14 -0700
Stub out LDM/STM
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 18:41:36 -0700
Fill in LDR/STR block
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 13:05:53 -0700
Simple error checking
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 04:34:19 -0700
Add store callbacks
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 04:20:44 -0700
Partially implement LDR/STR and friends
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 04:16:27 -0700
Apparently I can't count to 8
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 02:49:54 -0700
Filler for more instructions
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 00:32:01 -0700
Begin GBA structure
Jeffrey Pfau jeffrey@endrift.com
Fri, 05 Apr 2013 02:17:22 -0700
Implement immediate shifter
Jeffrey Pfau jeffrey@endrift.com
Fri, 05 Apr 2013 00:43:47 -0700
Fill in immediates
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 03:12:22 -0700
Implement BIC, MOV, MVN, ORR
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:42:17 -0700
Add stubs, including for illegal instructions
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:36:53 -0700
Fill in more opcodes, implement CMN, CMP, TEQ, TST
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:31:32 -0700
Implement ADD, ADC, RSB, RSC, SUB
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:04:51 -0700
Fill in more opcodes, implement EOR
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 01:27:51 -0700
Add boilerplate for instructions
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 00:46:50 -0700
Add more framework for loading instructions
Jeffrey Pfau jeffrey@endrift.com
Wed, 03 Apr 2013 22:34:49 -0700
Initial commit
Jeffrey Pfau jeffrey@endrift.com
Wed, 03 Apr 2013 22:12:15 -0700