Kludge to prevent busy-waiting while no frames are generating
Jeffrey Pfau jeffrey@endrift.com
Tue, 23 Apr 2013 23:07:24 -0700
Start using pixel flags to keep track of pixel states
Jeffrey Pfau jeffrey@endrift.com
Tue, 23 Apr 2013 22:48:01 -0700
Turbo mode
Jeffrey Pfau jeffrey@endrift.com
Tue, 23 Apr 2013 22:32:15 -0700
Implement STRB(2)
Jeffrey Pfau jeffrey@endrift.com
Tue, 23 Apr 2013 02:13:59 -0700
More sane way of writing 32-bit values to VRAM, palette
Jeffrey Pfau jeffrey@endrift.com
Tue, 23 Apr 2013 02:05:10 -0700
VRAM reading
Jeffrey Pfau jeffrey@endrift.com
Tue, 23 Apr 2013 02:03:06 -0700
Allow use of wrong LZ77 destination
Jeffrey Pfau jeffrey@endrift.com
Mon, 22 Apr 2013 22:55:49 -0700
Fix non-zero character base
Jeffrey Pfau jeffrey@endrift.com
Mon, 22 Apr 2013 02:28:03 -0700
Start implementing transparency
Jeffrey Pfau jeffrey@endrift.com
Mon, 22 Apr 2013 02:07:35 -0700
Fix drawing wide backgrounds
Jeffrey Pfau jeffrey@endrift.com
Mon, 22 Apr 2013 02:07:19 -0700
Write to VRAM
Jeffrey Pfau jeffrey@endrift.com
Mon, 22 Apr 2013 01:59:25 -0700
Was accidentally chopping off a bit in LZ77UnCompVram
Jeffrey Pfau jeffrey@endrift.com
Mon, 22 Apr 2013 01:12:48 -0700
Start drawing backgrounds
Jeffrey Pfau jeffrey@endrift.com
Mon, 22 Apr 2013 01:11:48 -0700
Sort backgrounds
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 20:59:43 -0700
Do some cleanup of pthread data
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 14:52:25 -0700
Implement BGxHOFS/BGxVOFS
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 14:43:28 -0700
Implement BGxCNT
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 14:09:41 -0700
Add struct for keeping track of background state
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 13:17:15 -0700
Start implementing DISPCNT
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 12:48:14 -0700
Pass off video registers to renderer
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 12:39:33 -0700
Start building up structs for video registers
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 12:33:03 -0700
Spring IRQs if we need to
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 01:09:11 -0700
Handle key, quit events
Jeffrey Pfau jeffrey@endrift.com
Sun, 21 Apr 2013 00:35:21 -0700
Support writing to palette, display palette on screen
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 22:08:58 -0700
Draw output buffer
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 21:40:06 -0700
Start using SDL for graphics syncing
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 20:29:53 -0700
Add missing files
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 18:08:52 -0700
Fix LDMIA/STMIA
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 18:03:59 -0700
Implement LSL(2)
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 18:03:48 -0700
Properly init and deinit renderers
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 16:47:04 -0700
Properly isolate threading
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 16:44:03 -0700
Wait on thread initialization before returning from thread creation
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 16:40:08 -0700
Restructure video memory
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 16:16:37 -0700
Move main emulation into thread
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 15:54:09 -0700
Fix MidiKey2Freq
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 14:46:53 -0700
Fix Load/store shifters
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 14:21:42 -0700
Implement MLA
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 13:36:42 -0700
Implement UMULL
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 13:22:10 -0700
Implement MidiKey2Freq
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 03:01:50 -0700
Implement LDR(2)
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 02:57:20 -0700
Implement LZ77 decompression
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 02:52:10 -0700
Init video memory from the dummy renderer
Jeffrey Pfau jeffrey@endrift.com
Sat, 20 Apr 2013 02:51:40 -0700
Define memory regions
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 23:34:26 -0700
Labels for I/O regions in the switch statement
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 23:04:01 -0700
Remainder of timer infrastructure
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 23:01:04 -0700
Implement timers from GBA.js implementation
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 22:26:44 -0700
Fix reading from DISPSTAT
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 21:40:57 -0700
Make sure if we reset the CPSR to the SPSR that we check if we get tossed into Thumb
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 21:26:00 -0700
Initialize cpu->privilegeMode
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 21:09:00 -0700
Squelch HLE BIOS warnings
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 21:04:53 -0700
Read/write REG_IF
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 00:05:13 -0700
Init GBA I/O registers
Jeffrey Pfau jeffrey@endrift.com
Fri, 19 Apr 2013 00:04:50 -0700
Install SIGINT signal handler for debugger
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 01:52:46 -0700
Null-check that DebugVectors get generated
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 01:39:51 -0700
Implement MUL
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 01:35:48 -0700
Implement ADD(5)
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 01:24:46 -0700
8-bit I/O reads
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 01:19:57 -0700
Store vcount back in IO
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 01:19:41 -0700
Fix addressing mode 3 immediate
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 01:06:19 -0700
Read back I/O memory when reading 32-bit
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 00:58:42 -0700
Ensure that DMAs read back from I/O memory properly
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 00:58:22 -0700
Ensure cpsr.t reads back out properly
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 00:19:41 -0700
Fix storing SPSR
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 00:15:45 -0700
Implement MSRI
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 00:09:28 -0700
Implement MRS
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 00:06:48 -0700
Fix some MRS/MSR encoding problems
Jeffrey Pfau jeffrey@endrift.com
Thu, 18 Apr 2013 00:03:39 -0700
Ensure loads to PC work
Jeffrey Pfau jeffrey@endrift.com
Wed, 17 Apr 2013 23:54:31 -0700
Implement LDM, STM
Jeffrey Pfau jeffrey@endrift.com
Wed, 17 Apr 2013 23:44:35 -0700
Now include source for HLE BIOS, even without assembler script
Jeffrey Pfau jeffrey@endrift.com
Wed, 17 Apr 2013 00:46:32 -0700
Add HLE BIOS from GBA.js
Jeffrey Pfau jeffrey@endrift.com
Wed, 17 Apr 2013 00:45:23 -0700
Make sure CPSR is updated for IRQ mode properly
Jeffrey Pfau jeffrey@endrift.com
Wed, 17 Apr 2013 00:29:20 -0700
Make sure to rewrite active region data when jumping to IRQ handler
Jeffrey Pfau jeffrey@endrift.com
Wed, 17 Apr 2013 00:24:00 -0700
Implement FastCpuSet
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 23:52:53 -0700
Fix ADD(4) and MOV(3)
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 23:52:30 -0700
Implement MUL
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 23:26:49 -0700
Implement ASR(1)
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 23:22:01 -0700
Implement HALT
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 23:14:16 -0700
Copy GBA.js DMA implementation
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 23:13:52 -0700
Copy some IRQ infrastructure from GBA.js
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 19:41:09 -0700
Clean up extra backslashes
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 19:29:00 -0700
Implement IRQs
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 07:50:34 -0700
Continue implementing IRQs
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 07:42:20 -0700
Remove typo struct member
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 07:20:28 -0700
Start implementing IRQ
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 07:18:25 -0700
Copy DISPSTAT implementation from GBA.js
Jeffrey Pfau jeffrey@endrift.com
Tue, 16 Apr 2013 07:10:38 -0700
Initialize video->eventDiff
Jeffrey Pfau jeffrey@endrift.com
Mon, 15 Apr 2013 23:15:02 -0700
Add dummy renderer + frame counting infrastructure from GBA.js
Jeffrey Pfau jeffrey@endrift.com
Mon, 15 Apr 2013 23:01:40 -0700
Start implementing events + add video stubs
Jeffrey Pfau jeffrey@endrift.com
Mon, 15 Apr 2013 22:18:28 -0700
Implement waitstate adjusting
Jeffrey Pfau jeffrey@endrift.com
Mon, 15 Apr 2013 01:10:53 -0700
Add function for loading from I/O
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 23:30:11 -0700
Start implementing instruction timing
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 23:12:03 -0700
Fix SWI32
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 13:46:48 -0700
Implement CpuSet
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 13:36:32 -0700
Split gba.c
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 13:21:21 -0700
Create subdirs
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 13:04:24 -0700
Implement SWI
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 11:57:39 -0700
Squelch some warnings
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 04:22:53 -0700
Stub out I/O
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 04:20:39 -0700
Move GBA load/stores internal to gba.c
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 04:08:06 -0700
Initialize breakpoints
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:49:48 -0700
Initialize debugger->lastCommand
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:47:11 -0700
Implement LDR[S]B/LDR[S]H (2)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:38:09 -0700
Implement BIC
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:31:35 -0700
Fix POP {pc}
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:28:58 -0700
Implement MVN
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:26:04 -0700
Fix BX
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:23:37 -0700
Implement SUB(1)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:15:21 -0700
Implement SUB(3)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:13:06 -0700
Implement LDRB(1)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:10:25 -0700
Implement CMP(2)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:08:07 -0700
Implement NEG
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:06:11 -0700
Implement SUB(2)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:03:19 -0700
Implement LDRH(1)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 03:00:06 -0700
Implement STRB(1)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 02:58:05 -0700
Implement BX
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 02:55:12 -0700
Add missing field for breakpoints
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 02:54:58 -0700
Fix indentation of LSR(2)/ASR(2)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 02:51:21 -0700
Implement LSR(2)
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 02:49:07 -0700
Rudimentary breakpoints
Jeffrey Pfau jeffrey@endrift.com
Sun, 14 Apr 2013 02:42:09 -0700
Add n command, and command repetition
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 14:06:57 -0700
Pause on stub opcodes
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 13:56:29 -0700
Add ability to run code indefinitely (or at least until we crash)
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 13:50:41 -0700
Implement B
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 12:38:47 -0700
Implement ADD(4)
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 12:32:15 -0700
Implement CMP(3)
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 12:28:24 -0700
Implement AND, EOR and ORR
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 01:50:21 -0700
Add missing CPSR update for ASR(2)
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 01:48:00 -0700
Implement ASR(2)
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 01:42:34 -0700
Add memory reading commands to debugger
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 01:36:01 -0700
Properly recognize syntax errors
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 01:27:05 -0700
Print hex
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 01:25:21 -0700
Begin command line parsing
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 01:23:41 -0700
Add ability to print current instruction
Jeffrey Pfau jeffrey@endrift.com
Sat, 13 Apr 2013 00:22:27 -0700
Fix sign-extension on BL1
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:59:19 -0700
Implement B(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:58:50 -0700
Implement CMP(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:44:51 -0700
Implement ADD(3), refactor other ADDs
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:34:44 -0700
Implement LSR(1) and reindent LSL(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:24:35 -0700
Implement LDR(4)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:18:46 -0700
Implement ADD(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:17:37 -0700
Fix BL(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:14:01 -0700
Implement LDR(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 22:06:17 -0700
Implement STR(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 21:56:46 -0700
Implement STR(3)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 21:48:30 -0700
Implement ADD(2)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 21:48:19 -0700
Command to break into attached debugger
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 21:27:43 -0700
Implement LDR(3)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 20:09:27 -0700
Implement STRH(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 20:06:58 -0700
Implement LSL(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 20:00:14 -0700
Implement ADD(6)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 19:59:55 -0700
Implement MOV(1)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:44:04 -0700
Implement ADD(7)/SUB(4)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:22:37 -0700
Implement MOV(3)
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:15:47 -0700
Set bits in MSR properly
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:10:09 -0700
Print proper register
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:04:51 -0700
Add some basic input to the debugger
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 02:03:11 -0700
Initial debugger
Jeffrey Pfau jeffrey@endrift.com
Fri, 12 Apr 2013 01:32:43 -0700
Move CMakeList
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 23:58:13 -0700
Add linenoise module
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 23:52:51 -0700
Implement BL
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 03:14:09 -0700
Implement LDMIA/STMIA/PUSH/POP
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 03:01:07 -0700
Stub out incomplete addressing mode 1 opcodes
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 02:13:35 -0700
Start fleshing out addressing mode 1
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 01:32:30 -0700
Implement BX
Jeffrey Pfau jeffrey@endrift.com
Thu, 11 Apr 2013 00:14:12 -0700
Put stub definitions in all of Thumb
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 23:38:18 -0700
Add ability to run Thumb code
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 23:34:50 -0700
Log stubs
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 22:52:46 -0700
Stub out BL, finishing Thumb table
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 21:11:05 -0700
Stub out B
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 21:09:22 -0700
Stub out SWI
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 21:05:19 -0700
Stub out conditional branches
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 21:04:41 -0700
Stub out LDMIA/STMIA
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 20:58:05 -0700
Stub out BKPT (not in ARMv4T, but still useful)
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 20:50:56 -0700
Stub out POP/PUSH
Jeffrey Pfau jeffrey@endrift.com
Wed, 10 Apr 2013 00:00:24 -0700
Stub out ADD7 and SUB4
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:47:37 -0700
Stub out ADD from PC and SP
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:45:08 -0700
Stub out LDR/STR from SP
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:37:28 -0700
Stub out more load/stores with immediates
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:34:25 -0700
Stub out more load/store format 2
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:27:37 -0700
Put in missing BX
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:16:30 -0700
Stub out STR2
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 23:00:31 -0700
Stub out LDR3
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:57:24 -0700
Stub out format 8
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:51:21 -0700
Define data format 5
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:35:51 -0700
Fix data format 3
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:35:38 -0700
Minor ROM access optimization
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 22:20:35 -0700
Add data form 3
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 04:20:14 -0700
ADD/SUB 1 stubs
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 03:20:32 -0700
Macro-insanity for Thumb
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 03:15:50 -0700
Start filling in THUMB table with insane preprocessor tricks
Jeffrey Pfau jeffrey@endrift.com
Tue, 09 Apr 2013 02:57:24 -0700
Fix warnings + LDR[B]T/STR[B]T
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 03:14:18 -0700
Load/store working RAM
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 03:13:37 -0700
Loading 8/16 bits from ROM
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 02:13:40 -0700
Ensure CPSR privilege gets updated in MSR
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 00:21:28 -0700
Don't double-execute AL instructions
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 00:17:54 -0700
Implement MSR
Jeffrey Pfau jeffrey@endrift.com
Mon, 08 Apr 2013 00:15:16 -0700
Separate out ISA files
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 21:15:32 -0700
Remove inline conditions and add ARM specialization
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 20:37:48 -0700
Start filling in ARMBoard
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 13:25:45 -0700
Mode switching
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 02:36:41 -0700
ALU instructions can write to PC
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 02:01:14 -0700
Fix writing to PC
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:57:04 -0700
Mini-test
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:39:49 -0700
Fix B
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:39:08 -0700
De-inline ARMStep
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:46:48 -0700
GBA ROM loading
Jeffrey Pfau jeffrey@endrift.com
Sun, 07 Apr 2013 01:46:28 -0700
Implement B
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 20:16:14 -0700
Load from ARM table now that we have one
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 20:06:51 -0700
Fill remainder of table
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 20:01:32 -0700
Stub out SWI
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:58:01 -0700
Stub out coprocessor
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:52:45 -0700
Cleanup
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:38:14 -0700
Stub out branch instructions
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 19:22:14 -0700
Stub out LDM/STM
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 18:41:36 -0700
Fill in LDR/STR block
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 13:05:53 -0700
Simple error checking
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 04:34:19 -0700
Add store callbacks
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 04:20:44 -0700
Partially implement LDR/STR and friends
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 04:16:27 -0700
Apparently I can't count to 8
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 02:49:54 -0700
Filler for more instructions
Jeffrey Pfau jeffrey@endrift.com
Sat, 06 Apr 2013 00:32:01 -0700
Begin GBA structure
Jeffrey Pfau jeffrey@endrift.com
Fri, 05 Apr 2013 02:17:22 -0700
Implement immediate shifter
Jeffrey Pfau jeffrey@endrift.com
Fri, 05 Apr 2013 00:43:47 -0700
Fill in immediates
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 03:12:22 -0700
Implement BIC, MOV, MVN, ORR
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:42:17 -0700
Add stubs, including for illegal instructions
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:36:53 -0700
Fill in more opcodes, implement CMN, CMP, TEQ, TST
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:31:32 -0700
Implement ADD, ADC, RSB, RSC, SUB
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 02:04:51 -0700
Fill in more opcodes, implement EOR
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 01:27:51 -0700
Add boilerplate for instructions
Jeffrey Pfau jeffrey@endrift.com
Thu, 04 Apr 2013 00:46:50 -0700
Add more framework for loading instructions
Jeffrey Pfau jeffrey@endrift.com
Wed, 03 Apr 2013 22:34:49 -0700
Initial commit
Jeffrey Pfau jeffrey@endrift.com
Wed, 03 Apr 2013 22:12:15 -0700